This invention relates generally to semiconductor devices, and more specifically to a semiconductor device having reduced on resistance and gate charge as well as its method of manufacture.
There is a need for a more efficient power semiconductor device, in particular power metal-oxide-silicon field effect transistor (MOSFET) devices for high frequency applications. It would be desirable to have a power device with low on resistance, a low gate charge and fast switching capabilities.
In high frequency applications, a power device having a low gate charge is desired in order to limit switching losses that lower overall system efficiency. In addition, when the power device is used in low side applications such as in the low side of a buck converter, a low ratio of gate-drain charge to gate-source charge below threshold voltage (i.e., Qgd/Qgs(th)) is desirable to prevent false turn on or shoot-through current, which also lowers the efficiency of the system. In order to achieve a low Qgd/Qgs(th), it is desirable to manufacture a power device that has low gate to drain capacitance.
Planar vertical power devices manufactured in the past have not been able to achieve low on resistance and low gate charge because changes in the design to lower on resistance detrimentally affect other performance parameters. The tradeoffs of these performance characteristics become a device designer's dilemma that cannot be easily resolved with the conventional planar MOSFET structures used in the past.
Power devices can be manufactured using a trench structure instead of a planar structure. Trench MOSFET designs do obtain lower on resistance. However, trench MOSFETs available today have a high gate charge and thus are not ideal for use in high frequency applications.
Accordingly, a need exists for a device structure that provides for low on resistance and low gate charge for use in high frequency applications. In addition, it would be advantageous for such a device to be fabricated in a cost effective manner.